A 4 x 4 FPGA-based wireless testbed for LTE applications
A digital signal processing architecture for soft-output MIMO lattice reduction aided detection
A family of irregular LDPC codes with low encoding complexity
A VLSI 8x8 MIMO near-ML decoder engine
A VLSI optimised parallel tree search for MIMO
Addendum and correction to "Optimal phases for a family of quadriphase CDMA sequences"
An optimization-based approach to scheduling residential battery storage with solar PV: assessing customer benefit
Bifurcations and EXIT charts for the binary erasure channel
Can cyclic codes be useful low-density parity-check codes?
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